1. Field of the Invention
The present invention relates to a serial data transfer device for serially transferring data in synchronism with clocks, and more particularly to a serial data transfer device for transferring the data at the transfer timings made coincident when the same command is simultaneously issued to a plurality of circuits to be controlled.
2. Description of the Related Art
Generally, a television receiver or home video tape recorder (VTR) incorporates a plurality of ICs. In some cases, these ICs are controlled by a single controller (microcomputer). The control system includes a serial system and a parallel system. However, in many cases, the serial system which requires a less number of lines is used. The serial system creates a start signal, slave address signal, a transfer data, stop signal, etc. in combination of logic values of "H" and "L" of the data and clock and uses a repetition signal including these plurality of signals to constitute one cycle. In this case, the transfer data carry several kinds of information.
FIGS. 2A and 2B show data and clocks in the serial data transfer device in such a serial system, respectively. Timing t1 denotes a start point and timing t2 denotes a stop point. Between these timings, necessary transfer data exist.
The start point indicates the timing when the data shifts from "H" to "L" while the clock is "H". On the other hand, the stop point indicates the timing when the data shifts from "L" to "H" while the clock is "H". The data is captured by reading the value of the data on the falling edge of the clock (e.g. t3).
Upon completion of the single data transfer, the stop signal is generated to inform the completion of the data transfer. A next start signal arrives and a next transfer data comes.
Such a serial transfer system takes a longer time where it is required that a command is simultaneously transferred to a plurality of ICs.
For example, a home video tape recorder requires for a plurality of ICs (e.g. main YC signal processing IC, head amplifier IC, and OSD IC) to be changed into a reproduction mode or a recording mode. In this case, transfer of the information for mode change in a serial manner cannot operate the plurality of ICs at the same timings.
At present, upon completion of the mode change in all the ICs, the mode is changed formally.